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My understanding is if the bootloader is present, the reset vector must be set to the bootloader address high in memory. If the bootloader is not present as in my case (I use LArduinoISP and my code is large enough to overwrite the bootloader) I assume the reset vector must be set to the memory address 0. It's not clear to me how this might happen and I'm wondering which part of the compilation/upload process takes care of this and how it does this. |
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The LGT8F328P has no special bootloader section in the flash as the ATMEGA328P has. |
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The LGT8F328P has no special bootloader section in the flash as the ATMEGA328P has.
So how the bootloader is implemented?
The RESET vector is changed so it points to the address where the bootloader is flashed (top of flash). And when you upload an application via the bootloader the entry address of the code (which RESET vector should point normaly) is put in place of the WATCHDOG interrupt vector which is rarely used.
The bootloader code make this change and jumps to the address of the WDT vector (entry address of the application code).
Hope this helps a little.