Is there a lower bound on rate group driver clock?

[noahrose18]

I am wondering if there is a lower bound on the rate group driver block.
When I use the rate group driver at a clock rate of 25Hz, the dividers work as expected.
If I lower the clock rate to 250Hz or higher, the dividers cause interrupts half as often as expected.

[timcanham]

There isn't any inherent limit. You would be limited by the ability of the processor to keep up, however. It takes cycles to dispatch messages, and the Svc/ActiveRateGroup is designed to drop messages if the message queue fills:

https://github.com/nasa/fprime/blob/devel/Svc/ActiveRateGroup/ActiveRateGroup.fpp#L12

In your case, I'm guessing the processor is probably not fast enough to keep up with 250Hz.