A basic RISC-V simulator, implementing the RV32I Instructions.
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Updated
Dec 18, 2022 - Assembly
A basic RISC-V simulator, implementing the RV32I Instructions.
An assembler and hardware simulator for Mano Basic Computer, a 16-bit computer.
A hardware implementation on Logisim of the World's Worst Video Card designed by Ben Eater.
I developed a modular software architecture for a simulation of a simple 8-bit CPU in C. My goal was to make the software universally adaptable by building it modularly, allowing for easy customization and expansion of the simulation's features and components.
A hardware description and simulation language that allows users to simulate the behavior of a hardware system in a easy, intuitive and fast way.
A header-only C++ library that provides unit test facilities for Verilator which makes your testing procedure much easier.
Neural Networks deals with hardware implementations and simulation in mind
16 Bit, multicore, unicycle processor for general purpose simulated in VHDL. Created as a tool for teaching computer architecture at Federal University of Piauí.
A versatile software tool to analyse and configure CANopen devices.
VCD Waveform Viewer Extension for VScode
A resource-friendly VHDL model for large memory simulations
A register level simulation of the ATMega328 and other hardware
simulation of a multi-core (with an arbitrary number of cores) cache, including set associativity, with simple MSI cache coherency.
An assembler and hardware simulator for the Mano Basic Computer, a 16 bit computer
Computer Organization 2 Projects
simengine :: Hardware simulation engine for Alteeve's Anvil! Intelligent Availability platform and similar HA configurations
🖥️ An assembler and hardware simulator for the Mano Basic Computer, a 16 bit computer.
PROLEAD - A Probing-Based Leakage Detection Tool for Hardware and Software
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