yosys
Here are 124 public repositories matching this topic...
A possible replacement for openflow, which would be ideally contributed to the SymbiFlow project
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Aug 2, 2021 - Python
A nextpnr arch definition for the TuringTumble board game.
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Nov 5, 2022 - Verilog
Time domain to logarithmic frequency domain converter, as the polyphase FFT do for the linear.
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Mar 11, 2024 - VHDL
Sipeed Tang Nano: Fully Opensource Toolchain for FPGA Synthesis, Place & Route, and Download/Flash.
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May 28, 2024 - Makefile
Basic counter example in verilog for Tang Nano 20k using Yosys, Nextpnr and openFPGALoader.
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Jun 11, 2024 - Verilog
Design a Goertzel filter
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Oct 23, 2023 - VHDL
VSDMemSOC Implementation flow:: RTL2GDSII
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Mar 1, 2024 - Verilog
Some examples using VHDL in combination with the icebreaker board
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Sep 8, 2023 - Makefile
Yocto meta layers to gather all open source EDA tools : yosys (synthesis), icetools (FPGA) and all the glue needed to compile them
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Feb 7, 2021
Prettyosys is an easy-to-use and visually appealing wrapper for Symbioysys
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Feb 3, 2023 - Haskell
Fun project to produce (only) pulses as the MultiSignalGene do, with analogue circuits and FPGA or 74HC logic circuits.
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Feb 19, 2024 - PostScript
Hardware Design Program Hosting By VLSI System Design (https://www.vlsisystemdesign.com/)
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May 8, 2024 - Verilog
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