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Pull requests: calyxir/calyx
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[Profiling] Sample values at clock falling edges and accommodate single-enable control blocks/par arms
C: Calyx
Extension or change to the Calyx IL
#2081
opened Jun 2, 2024 by
ayakayorihiro
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Add an IR for BTOR2 to reduce the dependencies on the C parser
#2003
opened Apr 14, 2024 by
obhalerao
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Introduce verilog -> cocotb simulation Changes for the FPGA backend
C: fud2
experimental driver
fud2
path
C: FPGA
#1997
opened Apr 12, 2024 by
nathanielnrn
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[Do not merge] Bug with Bug in the implementation
default-assigns
Type: Bug
#1930
opened Feb 20, 2024 by
rachitnigam
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Calyx wrapper for Berkeley HardFloat Verilog library
#1928
opened Feb 19, 2024 by
jiahanxie353
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ProTip!
Updated in the last three days: updated:>2024-05-30.