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4,356 public repositories
matching this topic...
HAL – The Hardware Analyzer
The ultimate Amiga games & demo scene setup for MiSTer & Pocket FPGAs, emulators, and real hardware. Open source, community driven. This is an Amiga HDF image builder using WHDL or custom installs, based on the Arcade Game Selector launcher.
Updated
Jun 2, 2024
Python
Amaranth HDL framework for laser scanner with motion control
Updated
Jun 2, 2024
Python
Portable FPGA based Synthesizer/DSP processor
Atari STE MiSTery core for the Tang Nano 20k FPGA
Updated
Jun 2, 2024
SystemVerilog
NESTang is an FPGA Nintendo Entertainment System implemented with Sipeed Tang Primer 25K, Nano 20K and Primer 20K boards
Updated
Jun 2, 2024
SystemVerilog
Structural Netlist API (and more) for EDA post synthesis flow development
A C++ to Verilog translation tool with some basic guarantees that your code will work.
Project framework for Chisel
Updated
Jun 2, 2024
Scala
Very small and high performance CPU
Updated
Jun 2, 2024
Verilog
a verilog implementation of arbitrary waveform generator with Red Pitaya
Updated
Jun 2, 2024
Jupyter Notebook
learn the combinational and sequential logic circuit.
Updated
Jun 2, 2024
SystemVerilog
Designing a Multi-Agent Fabric Integration Architecture to run on de10-lite FPGA.
Updated
Jun 2, 2024
SystemVerilog
Over-engineered SDR development board
Hardware Design/Visualization/Simulation/RTLGeneration Framework
Updated
Jun 1, 2024
Jupyter Notebook
Documenting the Xilinx 7-series bit-stream format.
Updated
Jun 1, 2024
Python
FPGA cores compatible with multiple arcade game machines and KiCAD schematics of arcade games. Working on MiSTer FPGA/Analogue Pocket
Updated
Jun 1, 2024
Verilog
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
Updated
Jun 2, 2024
Assembly
Digital Signal Processing implementation on Field-Programmable Field Array
Spicing up the first and only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples.
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